![]() The second stage provides a higher current gain and an enhanced PSRR. The op-amp has a closed feedback loop to neglect the current proportional-to-absolute-temperature (PTAT) and the negative TC. ![]() It includes a 2-stage op-amp for higher power supply rejection ration (PSRR). The first stage provides a fixed BGR voltage of 1 V with a temperature coefficient (TC) of 35 ppm/ 0 C. In this paper, an enhanced 2-stage BGR circuit with constant voltage and current outputs is presented with a 1.2 V supply voltage. It has a stabilized voltage/current value over process-voltage-temperature (PVT) variations. īandgap Reference (BGR) circuit is the main crucial element in designing any electronic systems. ![]() The final design occupies approximately 1.5mm 2. The class-D audio amplifier achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06%, and a power efficiency of 93%. The proposed class-D audio amplifier was designed, simulated and layed out in Cadence using TSMC 130 nm SOI-BCD technology. Its performance was found to be better than previously published output stages implemented in SOI based BCD processes, which are typically more complex and costly. The design method proposed in this study uses two on-chip shunt regulators to provide stable on-chip supply voltages to the gate driver circuits and a second-order feedback loop to suppress supply ripple. The class-D audio amplifier consists of two DMOS power transistors in a totem-pole configuration, a gate driver, a shunt regulator, a ramp generator, a comparator and an integrator. In this work, design of class D audio power amplifier output stage implemented in 130 nm Silicon-on-Insulator (SOI) technology is proposed for high power efficiency and low distortion.
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